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アイテム
A Study to Evaluate and Project Soft Error Tolerance in Radiation-hardened Circuits Using Device and Physical Level Simulations
http://hdl.handle.net/10212/2312
http://hdl.handle.net/10212/2312a42dd999-ca06-48e9-8739-50a6d39632da
| 名前 / ファイル | ライセンス | アクション |
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内容の要約 (67.9 KB)
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内容・審査結果の要旨 (343.5 KB)
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| Item type | 学位論文 / Thesis or Dissertation(1) | |||||||||
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| 公開日 | 2017-09-01 | |||||||||
| タイトル | ||||||||||
| タイトル | A Study to Evaluate and Project Soft Error Tolerance in Radiation-hardened Circuits Using Device and Physical Level Simulations | |||||||||
| 言語 | en | |||||||||
| その他のタイトル | ||||||||||
| その他のタイトル | デバイスレベルと物理レベルシミュレーションを用いた対放射線回路のソフトエラー耐性の評価手法と予測手法に関する研究 | |||||||||
| 言語 | ja | |||||||||
| 作成者 |
張, 魁元
× 張, 魁元
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| アクセス権 | ||||||||||
| アクセス権 | open access | |||||||||
| アクセス権URI | http://purl.org/coar/access_right/c_abf2 | |||||||||
| 主題 | ||||||||||
| 言語 | en | |||||||||
| 主題Scheme | Other | |||||||||
| 主題 | Soft Error | |||||||||
| 主題 | ||||||||||
| 言語 | en | |||||||||
| 主題Scheme | Other | |||||||||
| 主題 | Radiation-hard | |||||||||
| 主題 | ||||||||||
| 言語 | en | |||||||||
| 主題Scheme | Other | |||||||||
| 主題 | VLSI | |||||||||
| 主題 | ||||||||||
| 言語 | en | |||||||||
| 主題Scheme | Other | |||||||||
| 主題 | Simulation | |||||||||
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| 言語 | en | |||||||||
| 主題Scheme | Other | |||||||||
| 主題 | TCAD | |||||||||
| 主題 | ||||||||||
| 言語 | en | |||||||||
| 主題Scheme | Other | |||||||||
| 主題 | PHITS | |||||||||
| 内容記述 | ||||||||||
| 内容記述タイプ | Abstract | |||||||||
| 内容記述 | My thesis focuses on projection and evaluation for soft error tolerance in the radiation-hardened circuit by device and physics level simulations. The SERs of various circuit, layout and device structures are discussed. A high accurate Monte-Carlo based simulation methodology is also proposed in this thesis. Firstly, the device and physical level simulations methodology for soft error are described in Chapter 2. In my thesis, the charge generation and collection mechanisms by direct ionization are simulated by TCAD simulator SENTAURUS, and the mechanisms by indirect ionization are simulated by Monte-Carlo based physical-level simulator PHITS. After that in Chapter 3, the parasitic bipolar effects are investigated to suppress MCUs on radiation-hardened dual-modular flip-flops in a 65-nm process. Device simulations reveal that a simultaneous flip of redundant latches is suppressed by storing opposite values instead of storing the same value due to its asymmetrical structure. Then, in Chapter 4, the contributions of layout structures to suppress MCU are analyzed by device-level simulations and neutron-beam tests. Device simulation and experimental results reveal that the ratio of MCU to SEU decreases by increasing the distance between 65-nm process redundant latches. MCU is suppressed effectively by increasing the density of well contacts. Furthermore, in Chapter 5, the SERs (Soft Error Rates) of FD-SOI processes depending on BOX (Buried OXide) regions and body bias are estimated by alpha, neutron-beam tests and a proposed Monte-Carlo based simulations. The simulated results are consistent with the alpha and neutron irradiation experimental results. Simulated results reveal that the SERs are decreased by increasing the thickness of BOX layer. By applying the reverse body bias the tolerance for soft error becomes stronger in SOTB while that in UTBB becomes weaker. Finally, Chapter 6 summarizes the contribution of my thesis. | |||||||||
| 言語 | en | |||||||||
| 日付 | ||||||||||
| 日付 | 2016-03-25 | |||||||||
| 日付タイプ | Issued | |||||||||
| 言語 | ||||||||||
| 言語 | eng | |||||||||
| 資源タイプ | ||||||||||
| 資源タイプ識別子 | http://purl.org/coar/resource_type/c_db06 | |||||||||
| 資源タイプ | doctoral thesis | |||||||||
| 学位授与番号 | ||||||||||
| 学位授与番号 | 甲第786号 | |||||||||
| 学位名 | ||||||||||
| 言語 | ja | |||||||||
| 学位名 | 博士（工学） | |||||||||
| 学位授与年月日 | ||||||||||
| 学位授与年月日 | 2016-03-25 | |||||||||
| 学位授与機関 | ||||||||||
| 学位授与機関識別子Scheme | kakenhi | |||||||||
| 学位授与機関識別子 | 14303 | |||||||||
| 言語 | ja | |||||||||
| 学位授与機関名 | 京都工芸繊維大学 | |||||||||
